Product Information

1785-L20E (ALLEN BRADLEY)

Brand:
ALLEN BRADLEY
Part Number/ Model Number:
1785-L20E
Lead Time:
AVAILABLE
Quantity in Stock:
AVAILABLE
Description

Allen-Bradley 1785-L20E EtherNet PLC-5/20 Controller 16Kb Word SRAM

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ALLEN BRADLEY 1785-L20E
Introduction
The PLC-5 processors are single-slot modules that are placed into the left-most slot of a 1771 I/O chassis. They are available in a range of I/O, memory, and communication capability. PLC-5 processors have ports configurable for either a Data Highway Plus messaging communication link or a Universal Remote I/O link. As a Universal Remote I/O port, it can be configured as either an I/O scanner port or an I/O adapter port. As an I/O scanner port, it monitors and controls the I/O on the link by communicating with the I/O adapters for those I/O. As an adapter port, it communicates only with the I/O scanner port on the link, passing a maximum of one I/O rack of input and output data between the two to provide distributed processing. All PLC-5 processors have Data Highway Plus and RS-232-C/422-A/423-A communication ports. In addition to these ports, each Ethernet PLC-5 processor has an Ethernet communication port, and each ControlNet PLC-5 processor has a ControlNet communication port. Although each Ethernet PLC-5 processor has on-board Ethernet ports; additional Ethernet ports can be added to any PLC-5 processor system with a 1785-ENET Ethernet Interface Module. PLC-5 processors do not have an on-board DeviceNet port. A DeviceNet port can be added to the system with a 1771-SDN scanner module.
Features

  • 512 through 3072 maximum forcible I/O in any mix
  • Advanced instruction set including file handling, sequencer, diagnostic, shift register, immediate I/O, and program control instructions
  • Ladder-logic and structured-text programming
  • Multiple main control programs for segregation of control tasks
  • Processor input interrupts and global status flags
  • Programmable fault response for reacting to a fault before the system goes down
  • Protected memory selectable by word on selected processors
  • Timed interrupt routine for examining specific information at specific time intervals
  • Up to 50,176 maximum non-forcible I/O
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